High Speed Data D acquisition system

High Speed Data A / D acquisition system to meet the high-speed, real-time, continuous acquisition. Assurance system , Continuous high sampling rate, high-resolution data acquisition,  Real-time good, high throughput, wide range of signal input, and good anti-interference.

Features

1, A high sampling rate with high-performance ultra-high-speed A / D conversion chip DES bilateral sampling, sampling rates up to 3Gsps;
2, high-resolution 
A / D conversion chip is 8-bit dual channel converter; effective number of bits (ENOB) of 7.2 (typical value), signal to noise ratio (SNR) up to 45.5dB (typical value), No false signal dynamic range (SFDR) is up to 53.4dB (typical value);
3, real-time high 500MHz DCM Digital Clock Manager, for precision clock management; high-speed continuous sampling, ensuring a high degree of real-time data acquisition;
4, high-throughput data using in-house integrated demultiplexer (DEMUX), can reduce the data rate and can be easily with many types of high-speed FPGA directly connected to achieve high-speed data storage and processing.


Main Technical Specifications

Sampling rate: Dual-channel maximum sampling rate 1.5Gsps, single-channel maximum sampling rate 3.0Gsps
Resolution: 8-bit dual analog input bandwidth: 30MHz ~ 1.8GHz
Gain Flatness: 30MHz ~ 1.5GHz, within the, ± 2dBFS
Signal to noise ratio (SNR): 45.5dB
No false signal dynamic range (SFDR): 53.4dB