Specifications:
1. DDR2 533,667,800MHZ
2. 240-pin socket type dual in line memory module (DIMM)
3. 2.6V power supply
4. Data rate: 400Mbps (max.)
5. 2.5 V (SSTL-2 compatible) I/O
6. Double data rate architecture, two data transfers per clock
7. Bi-directional, data strobe (DQS) is transmitted/received with data, to be
used in capturing data at the receiver
8. Data inputs and outputs are synchronized with DQS
9. DQS is edge aligned with data for READs, center aligned with data for WRITEs
10. Differential clock inputs (CK and CK)
11. DLL aligns DQ and DQS transitions with CK transitions
12. Commands entered on each positive CK edge, data referenced to both
edges of DQS
13. Auto precharge option for each burst access
14. Programmable burst length: 2, 4, 8
15. Programmable/CAS latency (CL): 3
16. Programmable output driver strength: normal/weak
1. DDR2 533,667,800MHZ
2. 240-pin socket type dual in line memory module (DIMM)
3. 2.6V power supply
4. Data rate: 400Mbps (max.)
5. 2.5 V (SSTL-2 compatible) I/O
6. Double data rate architecture, two data transfers per clock
7. Bi-directional, data strobe (DQS) is transmitted/received with data, to be
used in capturing data at the receiver
8. Data inputs and outputs are synchronized with DQS
9. DQS is edge aligned with data for READs, center aligned with data for WRITEs
10. Differential clock inputs (CK and CK)
11. DLL aligns DQ and DQS transitions with CK transitions
12. Commands entered on each positive CK edge, data referenced to both
edges of DQS
13. Auto precharge option for each burst access
14. Programmable burst length: 2, 4, 8
15. Programmable/CAS latency (CL): 3
16. Programmable output driver strength: normal/weak
